Full support for multicore platforms, including the Altera Cyclone V, Freescale i.MX6, Xilinx Zynq-7000, and TI OMAP4430 and OMAP4460. With a simple recompile, get automatic, multicore SMP, in less than 6 kilobytes.
In addition to the standard feature set supported by most real-time kernels, the Abassi RTOS can be configured with many features unmatched in the industry. These features add robustness and code savings, and include:
Abassi supports major ARM development tools, including Code Composer Studio.
|Demo 3:||Complex demo that shows the operations of some unique features of the Abassi RTOS. Operational characteristics of the tasks can be modify through the serial port.|
Details of each of the demonstrations can be found here.
Don't settle for half a RTOS! Even with all features enabled, Abassi still consumes less memory than the minimum configuration of most kernels. And you get advanced priority inheritance, asymmetric round-robin scheduling, starvation protection, and much more. Or, if memory footprint is paramount, Abassi scales to a minimum size that can't be matched.
|Minimal Build||<775 bytes|
|+ Runtime service creation / static memory||<1025 bytes|
|+ Multiple tasks at same priority||<1125 bytes|
|+ Runtime priority change
+ Mutex priority inheritance
+ Task suspension
|+ Timer & timeout
+ Timer call back
+ Round robin
|Full Feature Build (no name / no runtime creation)||<2825 bytes|
|Full Feature Build (no names)||<3225 bytes|
|Assembly code size||804 bytes|
|Saturation Bit Enabled||+36 bytes|
For your exact data memory requirements, please consult the Porting Document that applies to your design environment.