Abassi RTOS for MIPS


    1. Fully scalable footprint (as low as 1250 bytes on MIPS® M4K®; <3625 bytes)
    2. Fast Execution (32 clock cycle context switch, 0.40μs on PIC32 @80MHz;
      2.28μs task switch on semaphore posting)
    3. Unlimited Tasks, Queues, Events, Semaphores, Mutexes and Mailboxes
    4. Flexible licensing options
    5. Available source code
    6. Comprehensive documentation
    7. Responsive Technical Support

Unmatched Feature Set

In addition to the standard feature set supported by most real-time kernels, the Abassi RTOS can be configured with many features unmatched in the industry. These features add robustness and code savings, and include:

    1. Intelligent starvation protectionGuarantees fair access to CPU, via enhanced priority aging, even on heavily loaded systems.
    2. Priority inheritance, including dynamic trackingAutomatically adjusts for priority aging, timeouts, etc. and propagationBetween entangled mutex owners, to prevent deadlock.
    3. Adaptive priority ceiling
    4. Deadlock detectionReports recursive mutex dependencies anywhere in the execution chain.
    5. AsymmetricTimeslice adjustable at a per task level. Round Robin scheduling
    6. Hybrid interrupt stack

Development Tool Choices

Abassi supports major MIPS development tools, including Microchip/MPLAB.

Memory Requirements

Don't settle for half a RTOS! Even with all features enabled, Abassi still consumes less memory than the minimum configuration of most kernels. And you get advanced priority inheritance, asymmetric round-robin scheduling, starvation protection, and much more. Or, if memory footprint is paramount, Abassi scales to a minimum size that can't be matched.

"C" Code Memory Usage
Description MIPS16e MIPS32
Minimal Build <800 bytes <1175 bytes
+ Runtime service creation / static memory <1050 bytes <1600 bytes
+ Multiple tasks at same priority <1125 bytes <1700 bytes
+ Runtime priority change
+ Mutex priority inheritance
+ Task suspension
<1725 bytes <2350 bytes
+ Timer & timeout
+ Timer call back
+ Round robin
<2125 bytes <3175 bytes
+ Events
+ Mailbox
<2600 bytes <3975 bytes
Full Feature Build (no name / no runtime creation) <2775 bytes <4150 bytes
Full Feature Build (no names) <3175 bytes <4825 bytes
Assembly Code Memory Usage
Description MIPS16e MIPS32
Assembly code size 440 bytes 580 bytes
Auto-clear Enabled +36 bytes +36 bytes
Hybrid Stack Enabled +32 bytes +32 bytes
Data Memory Usage
Description MIPS16e MIPS32
Base Kernel 288 bytes 288 bytes
+ Task 32 bytes 32 bytes
+ Semaphore 12 bytes 12 bytes
+ Request 12 bytes 12 bytes
+ Mailbox 28 bytes 28 bytes
Measured using current software release, configured for PIC32MX460F512L at 80 MHz and MPLAB IDE using the GCC tool suite, Version

For your exact data memory requirements, please consult the Porting Document that applies to your design environment.

Kernel Snapshot

  1. Fully preemptive
  2. Scalable
  3. Very small code and data footprint
  4. Code can reside in ROM
  5. Zero interrupt latency kernel
  6. Mutexes
    1. Configurable priority inheritance
    2. Adaptive priority ceiling
    3. Priority based and first-come, first-served
  7. Versatile semaphores
    1. Counting and binary
    2. Priority based and first-come, first-served
  8. Mailboxes
    1. Priority based and first-come, first-served
  9. Events
  10. Intelligent starvation protection
  11. Hybrid interrupt stack
  12. Deadlock detection
  13. Single or multiple tasks per priority level
  14. Configurable Round Robin
  15. Dynamic priority changes
  16. Compile time task and component creation
  17. Run-time safe service creation
  18. No fixed number of tasks or components
  19. Programmable timeout on components
  20. Selectable scheduling search algorithm
  21. Optional cooperative mode
  22. Debug logging