Free multicore SMP RTOS !

Single core kernels are a dime a dozen, but what about multicore? Getting a multicore system up and running is far more complex: L1/L2 cache configuration, snoop control, memory mapping, getting all the cores out of reset, and communicating with one another, etc. All you want to do is be able to get programming as soon as possible, and not worry about all the tricky details.

That's why we have released a fully functional freeware version of our introductory µAbassi multicore RTOS. It is provided with a limited number of tasks, semaphores, and mutexes, but plenty for many application. Everything you need to get your multicore environment up and running, ready for real work and much better than bare-metal.

Platform Toolchain
Altera Arria 10 SoC DS-5
Altera Arria V SoC DS-5
Altera Cyclone V DS-5
Freescale i.MX6 Atollic
Zynq® 7000 XSDK
† Please review the readme.txt file in the uAbassi_SMP_CortexA9_DS5 directory for important details.

A feature highlight comparison table between mAbassi and μAbassi is available here.